The present invention relates to an inspection apparatus for electrically inspecting an inspection target such as a semiconductor element formed on a semiconductor wafer, and a liquid crystal device.
A conventional inspection apparatus, e.g., a probe apparatus for electrically inspecting a semiconductor element formed on a semiconductor wafer, is constituted by a loader section having a cassette table portion for placing a semiconductor wafer stored in a cassette and forceps for conveying a semiconductor wafer in this cassette, a prober section for inspecting the semiconductor wafer conveyed via the forceps of the loader section, a controller for controlling the prober and loader sections, and a display device also serving as an operation panel for operating the controller.
The prober section comprises a movable main chuck for placing the semiconductor wafer thereon, and an alignment mechanism for aligning the semiconductor wafer placed on the main chuck to an inspection position. The prober section has a probe card supported by the top wall portion of upper casing above the main chuck, and the probe card has a plurality of probe needles for electrically inspecting the semiconductor wafer aligned by the alignment mechanism. On this top wall, a test head is arranged to be turnable between inspection and non-inspection positions. When the test head turns to the inspection position above the prober section, the probe card and a tester arranged outside the apparatus are electrically connected via the test head, and a predetermined signal from the tester is exchanged via the probe card between the tester and the pad or electrodes of a semiconductor element, such as an IC chip, formed on the semiconductor wafer on the main chuck, electrically inspecting the IC chips by the tester in sequence.
In checking the inspection results of respective IC chips of the semiconductor wafer having inspected by the prober section, a nondefective (PASS) P or a defective (FAIL) F is printed for each IC chip on a printing sheet by using, e.g., a mapping printer connected to the tester in accordance with the arrangement of the IC chips on the semiconductor wafer in units of rows, as shown in FIG. 25. As for a semiconductor wafer during inspection, each time inspection of IC chips on one row is completed, P or F is printed on a printing sheet in accordance with the arrangement of the IC chips on the semiconductor wafer in units of rows.
In the conventional probe apparatus, however, since the prober section is almost entirely covered with the test head during inspection of the semiconductor wafer, and the loader section is covered with a cover or the like, the state and location of the inspection target such as a semiconductor wafer cannot be known. In addition, the state of the semiconductor wafer (to be referred to as "wafer status" hereinafter) inside the probe apparatus, e.g., whether the semiconductor wafer is being inspected on the main chuck, cannot be known, either.
In the conventional inspection apparatus, since the inspection result of each inspected semiconductor wafer must be printed on a printing sheet by the mapping printer, a special mapping printer and consumables such as a printing sheet are required. Further, when the inspection result of a desired semiconductor wafer is to be searched for, a large number of printing sheets must be turned over one by one. Even if the inspection result of the desired semiconductor wafer is found, since P and F are printed as nondefectives and defectives, it is difficult to visually recognize the distribution state of the nondefectives and defectives, the yield, and the like by intuition.